Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml- Extension
.yaml- Size
- 2170 bytes
- Lines
- 78
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mailbox/cix,sky1-mbox.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Cixtech mailbox controller
maintainers:
- Guomin Chen <Guomin.Chen@cixtech.com>
description:
The Cixtech mailbox controller, used in the Cixtech Sky1 SoC,
is used for message transmission between multiple processors
within the SoC, such as the AP, PM, audio DSP, SensorHub MCU,
and others
Each Cixtech mailbox controller is unidirectional, so they are
typically used in pairs-one for receiving and one for transmitting.
Each Cixtech mailbox supports 11 channels with different transmission modes
channel 0-7 - Fast channel with 32bit transmit register and IRQ support
channel 8 - Doorbell mode,using the mailbox as an interrupt-generating
mechanism.
channel 9 - Fifo based channel with 32*32bit depth fifo and IRQ support
channel 10 - Reg based channel with 32*32bit transmit register and
Doorbell+transmit acknowledgment IRQ support
In the CIX Sky1 SoC use case, there are 4 pairs of mailbox controllers
AP <--> PM - using Doorbell transfer mode
AP <--> SE - using REG transfer mode
AP <--> DSP - using FIFO transfer mode
AP <--> SensorHub - using FIFO transfer mode
properties:
compatible:
const: cix,sky1-mbox
reg:
maxItems: 1
interrupts:
maxItems: 1
"#mbox-cells":
const: 1
cix,mbox-dir:
$ref: /schemas/types.yaml#/definitions/string
description: Direction of the mailbox relative to the AP
enum: [tx, rx]
required:
- compatible
- reg
- interrupts
- "#mbox-cells"
- cix,mbox-dir
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
mbox_ap2pm: mailbox@30000000 {
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.