Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml- Extension
.yaml- Size
- 1443 bytes
- Lines
- 61
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mailbox/sophgo,cv1800b-mailbox.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sophgo CV1800/SG2000 mailbox controller
maintainers:
- Yuntao Dai <d1581209858@live.com>
- Junhui Liu <junhui.liu@pigmoral.tech>
description:
Mailboxes integrated in Sophgo CV1800/SG2000 SoCs have 8 channels, each
shipping an 8-byte FIFO. Any processor can write to an arbitrary channel
and raise interrupts to receivers. Sending messages to itself is also
supported.
properties:
compatible:
const: sophgo,cv1800b-mailbox
reg:
maxItems: 1
interrupts:
maxItems: 1
"#mbox-cells":
const: 2
description: |
<&phandle channel target>
phandle : Label name of mailbox controller
channel : 0-7, Channel index
target : 0-3, Target processor ID
Sophgo CV1800/SG2000 SoCs include the following processors, numbered as:
<0> Cortex-A53 (Only available on CV181X/SG200X)
<1> C906B
<2> C906L
<3> 8051
required:
- compatible
- reg
- interrupts
- "#mbox-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
mailbox@1900000 {
compatible = "sophgo,cv1800b-mailbox";
reg = <0x01900000 0x1000>;
interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
};
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.