Documentation/devicetree/bindings/media/amphion,vpu.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/media/amphion,vpu.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/media/amphion,vpu.yaml- Extension
.yaml- Size
- 4583 bytes
- Lines
- 179
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/firmware/imx/rsrc.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/amphion,vpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amphion VPU codec IP
maintainers:
- Ming Qian <ming.qian@nxp.com>
- Shijie Qin <shijie.qin@nxp.com>
description: |-
The Amphion MXC video encoder(Windsor) and decoder(Malone) accelerators present
on NXP i.MX8Q SoCs.
properties:
$nodename:
pattern: "^vpu@[0-9a-f]+$"
compatible:
items:
- enum:
- nxp,imx8qm-vpu
- nxp,imx8qxp-vpu
reg:
maxItems: 1
power-domains:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 1
ranges: true
patternProperties:
"^mailbox@[0-9a-f]+$":
description:
Each vpu encoder or decoder correspond a MU, which used for communication
between driver and firmware. Implement via mailbox on driver.
$ref: /schemas/mailbox/fsl,mu.yaml#
"^vpu-core@[0-9a-f]+$":
description:
Each core correspond a decoder or encoder, need to configure them
separately. NXP i.MX8QM SoC has one decoder and two encoder, i.MX8QXP SoC
has one decoder and one encoder.
type: object
properties:
compatible:
items:
- enum:
- nxp,imx8q-vpu-decoder
- nxp,imx8q-vpu-encoder
reg:
maxItems: 1
power-domains:
maxItems: 1
mbox-names:
items:
- const: tx0
Annotation
- Immediate include surface: `dt-bindings/firmware/imx/rsrc.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.