Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml- Extension
.yaml- Size
- 4593 bytes
- Lines
- 176
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/i2c/st,st-mipid02.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
maintainers:
- Benjamin Mugnier <benjamin.mugnier@foss.st.com>
- Sylvain Petinot <sylvain.petinot@foss.st.com>
description:
MIPID02 has two CSI-2 input ports, only one of those ports can be
active at a time. Active port input stream will be de-serialized
and its content outputted through PARALLEL output port.
CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2
second input port is a single lane 800Mbps. Both ports support clock
and data lane polarity swap. First port also supports data lane swap.
PARALLEL output port has a maximum width of 12 bits.
Supported formats are RAW6, RAW7, RAW8, RAW10, RAW12, RGB565, RGB888,
RGB444, YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
properties:
compatible:
const: st,st-mipid02
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: xclk
VDDE-supply:
description:
Sensor digital IO supply. Must be 1.8 volts.
VDDIN-supply:
description:
Sensor internal regulator supply. Must be 1.8 volts.
reset-gpios:
description:
Reference to the GPIO connected to the xsdn pin, if any.
This is an active low signal to the mipid02.
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: CSI-2 first input port
properties:
endpoint:
$ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false
properties:
data-lanes:
description:
Single-lane operation shall be <1> or <2> .
Dual-lane operation shall be <1 2> or <2 1> .
minItems: 1
maxItems: 2
lane-polarities:
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.