Documentation/devicetree/bindings/media/img,e5010-jpeg-enc.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/media/img,e5010-jpeg-enc.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/media/img,e5010-jpeg-enc.yaml- Extension
.yaml- Size
- 1725 bytes
- Lines
- 76
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/soc/ti,sci_pm_domain.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/img,e5010-jpeg-enc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Imagination E5010 JPEG Encoder
maintainers:
- Devarsh Thakkar <devarsht@ti.com>
description: |
The E5010 is a JPEG encoder from Imagination Technologies implemented on
TI's AM62A SoC. It is capable of real time encoding of YUV420 and YUV422
inputs to JPEG and M-JPEG. It supports baseline JPEG Encoding up to
8Kx8K resolution.
properties:
compatible:
oneOf:
- items:
- const: ti,am62a-jpeg-enc
- const: img,e5010-jpeg-enc
- const: img,e5010-jpeg-enc
reg:
items:
- description: The E5010 core register region
- description: The E5010 mmu register region
reg-names:
items:
- const: core
- const: mmu
power-domains:
maxItems: 1
resets:
maxItems: 1
clocks:
maxItems: 1
interrupts:
maxItems: 1
required:
- compatible
- reg
- reg-names
- interrupts
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/soc/ti,sci_pm_domain.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
jpeg-encoder@fd20000 {
compatible = "img,e5010-jpeg-enc";
reg = <0x00 0xfd20000 0x00 0x100>,
<0x00 0xfd20200 0x00 0x200>;
reg-names = "core", "mmu";
Annotation
- Immediate include surface: `dt-bindings/soc/ti,sci_pm_domain.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.