Documentation/devicetree/bindings/media/microchip,csi2dc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml

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Linux kernel
Corpus path
Documentation/devicetree/bindings/media/microchip,csi2dc.yaml
Extension
.yaml
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6038 bytes
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200
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/microchip,csi2dc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Microchip CSI2 Demux Controller (CSI2DC)

maintainers:
  - Eugen Hristev <eugen.hristev@microchip.com>

description:
  CSI2DC - Camera Serial Interface 2 Demux Controller

  CSI2DC is a hardware block that receives incoming data from either from an
  IDI interface or from a parallel bus interface.
  It filters IDI packets based on their data type and virtual channel
  identifier, then converts the byte stream to a pixel stream into a cross
  clock domain towards a parallel interface that can be read by a sensor
  controller.
  IDI interface is Synopsys proprietary.
  CSI2DC can act a simple bypass bridge if the incoming data is coming from
  a parallel interface.

  CSI2DC provides two pipes, one video pipe and one data pipe. Video pipe
  is connected at the output to a sensor controller and the data pipe is
  accessible as a DMA slave port to a DMA controller.

  CSI2DC supports a single 'port' node as a sink port with either Synopsys
  32-bit IDI interface or a parallel interface.

  CSI2DC supports one 'port' node as source port with parallel interface.
  This is called video pipe.
  This port has an 'endpoint' that can be connected to a sink port of another
  controller (next in pipeline).

  CSI2DC also supports direct access to the data through AHB, via DMA channel,
  called data pipe.
  For data pipe to be available, a dma controller and a dma channel must be
  referenced.

properties:
  compatible:
    const: microchip,sama7g5-csi2dc

  reg:
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 2

  clock-names:
    description:
      CSI2DC must have two clocks to function correctly. One clock is the
      peripheral clock for the inside functionality of the hardware block.
      This is named 'pclk'. The second clock must be the cross domain clock,
      in which CSI2DC will perform clock crossing. This clock must be fed
      by the next controller in pipeline, which usually is a sensor controller.
      Normally this clock should be given by this sensor controller who
      is also a clock source. This clock is named 'scck', sensor controller clock.
    items:
      - const: pclk
      - const: scck

  dmas:
    maxItems: 1

  dma-names:
    const: rx

Annotation

Implementation Notes