Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml- Extension
.yaml- Size
- 5423 bytes
- Lines
- 216
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/imx8mn-clock.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.hdt-bindings/power/imx8mn-power.hdt-bindings/clock/imx8mp-clock.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX8 Image Sensing Interface
maintainers:
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
description: |
The Image Sensing Interface (ISI) combines image processing pipelines with
DMA engines to process and capture frames originating from a variety of
sources. The inputs to the ISI go through Pixel Link interfaces, and their
number and nature is SoC-dependent. They cover both capture interfaces (MIPI
CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
properties:
compatible:
enum:
- fsl,imx8mn-isi
- fsl,imx8mp-isi
- fsl,imx8ulp-isi
- fsl,imx91-isi
- fsl,imx93-isi
- fsl,imx95-isi
reg:
maxItems: 1
clocks:
items:
- description: The AXI clock
- description: The APB clock
# TODO: Check if the per-channel ipg_proc_clk clocks need to be specified
# as well, in case some SoCs have the ability to control them separately.
# This may be the case of the i.MX8[DQ]X(P)
clock-names:
items:
- const: axi
- const: apb
fsl,blk-ctrl:
$ref: /schemas/types.yaml#/definitions/phandle
description:
A phandle referencing the block control that contains the CSIS to ISI
gasket.
interrupts:
description: Processing pipeline interrupts, one per pipeline
minItems: 1
maxItems: 8
power-domains:
maxItems: 1
ports:
$ref: /schemas/graph.yaml#/properties/ports
description: |
Ports represent the Pixel Link inputs to the ISI. Their number and
assignment are model-dependent. Each port shall have a single endpoint.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
Annotation
- Immediate include surface: `dt-bindings/clock/imx8mn-clock.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/power/imx8mn-power.h`, `dt-bindings/clock/imx8mp-clock.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.