Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml

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Linux kernel
Corpus path
Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
Extension
.yaml
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6285 bytes
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240
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/nxp,imx8mq-mipi-csi2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP i.MX8MQ MIPI CSI-2 receiver

maintainers:
  - Martin Kepplinger <martin.kepplinger@puri.sm>

description: |-
  This binding covers the CSI-2 RX PHY and host controller included in the
  NXP i.MX8MQ SoC. It handles the sensor/image input and process for all the
  input imaging devices.

properties:
  compatible:
    oneOf:
      - enum:
          - fsl,imx8mq-mipi-csi2
          - fsl,imx8qxp-mipi-csi2
          - fsl,imx8ulp-mipi-csi2
      - items:
          - const: fsl,imx8qm-mipi-csi2
          - const: fsl,imx8qxp-mipi-csi2

  reg:
    items:
      - description: MIPI CSI-2 RX host controller register.
      - description: MIPI CSI-2 control and status register (csr).
    minItems: 1

  clocks:
    items:
      - description: core is the RX Controller Core Clock input. This clock
                     must be exactly equal to or faster than the receive
                     byteclock from the RX DPHY.
      - description: esc is the Rx Escape Clock. This must be the same escape
                     clock that the RX DPHY receives.
      - description: ui is the pixel clock (phy_ref up to 333Mhz).
                     See the reference manual for details.
      - description: pclk is clock for csr APB interface.
    minItems: 3

  clock-names:
    items:
      - const: core
      - const: esc
      - const: ui
      - const: pclk
    minItems: 3

  power-domains:
    maxItems: 1

  resets:
    items:
      - description: CORE_RESET reset register bit definition
      - description: PHY_REF_RESET reset register bit definition
      - description: ESC_RESET reset register bit definition
    minItems: 1

  fsl,mipi-phy-gpr:
    description: |
      The phandle to the imx8mq syscon iomux-gpr with the register
      for setting RX_ENABLE for the mipi receiver.

      The format should be as follows:
      <gpr req_gpr>

Annotation

Implementation Notes