Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml

File Facts

System: Linux kernel
Corpus path: Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml
Extension: .yaml
Size: 5200 bytes
Lines: 221
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: configuration, schema, or hardware description
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

dt-bindings/clock/qcom,rpmh.h
dt-bindings/clock/qcom,sm8550-gcc.h
dt-bindings/clock/qcom,sm8450-videocc.h
dt-bindings/interrupt-controller/arm-gic.h
dt-bindings/interconnect/qcom,icc.h
dt-bindings/interconnect/qcom,sm8550-rpmh.h
dt-bindings/power/qcom-rpmpd.h
dt-bindings/power/qcom,rpmhpd.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/qcom,sm8550-iris.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm iris video encode and decode accelerators

maintainers:
  - Vikash Garodia <quic_vgarodia@quicinc.com>
  - Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>

description:
  The iris video processing unit is a video encode and decode accelerator
  present on Qualcomm platforms.

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - qcom,sa8775p-iris
              - qcom,x1e80100-iris
          - const: qcom,sm8550-iris
      - enum:
          - qcom,qcs8300-iris
          - qcom,sm8550-iris
          - qcom,sm8650-iris
          - qcom,x1p42100-iris

  reg:
    maxItems: 1

  power-domains:
    maxItems: 4

  power-domain-names:
    items:
      - const: venus
      - const: vcodec0
      - const: mxc
      - const: mmcx

  clocks:
    minItems: 3
    maxItems: 4

  clock-names:
    minItems: 3
    items:
      - const: iface
      - const: core
      - const: vcodec0_core
      - const: vcodec0_bse

  firmware-name:
    maxItems: 1

  interrupts:
    maxItems: 1

  interconnects:
    maxItems: 2

  interconnect-names:
    items:
      - const: cpu-cfg
      - const: video-mem

  resets:

Annotation

Immediate include surface: `dt-bindings/clock/qcom,rpmh.h`, `dt-bindings/clock/qcom,sm8550-gcc.h`, `dt-bindings/clock/qcom,sm8450-videocc.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interconnect/qcom,icc.h`, `dt-bindings/interconnect/qcom,sm8550-rpmh.h`, `dt-bindings/power/qcom-rpmpd.h`, `dt-bindings/power/qcom,rpmhpd.h`.
Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.