Documentation/devicetree/bindings/media/ti,vip.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/media/ti,vip.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/media/ti,vip.yaml
Extension
.yaml
Size
4196 bytes
Lines
153
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2025 Texas Instruments Incorporated -  http://www.ti.com/
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/ti,vip.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments DRA7x Video Input Port (VIP)

maintainers:
  - Yemike Abhilash Chandra <y-abhilashchandra@ti.com>

description: |-
  Video Input Port (VIP) can be found on devices such as DRA7xx and
  provides the system interface and the processing capability to
  connect parallel image-sensor as well as BT.656/1120 capable encoder
  chip to DRA7x device.

  Each VIP instance supports 2 independently configurable external
  video input capture slices (Slice 0 and Slice 1) each providing
  up to two video input ports (Port A and Port B).

properties:
  compatible:
    enum:
      - ti,dra7-vip

  reg:
    maxItems: 1

  interrupts:
    items:
      - description: IRQ index 0 is used for Slice0 interrupts
      - description: IRQ index 1 is used for Slice1 interrupts

  ti,ctrl-module:
    description:
      Reference to the device control module that provides clock-edge
      inversion control for VIP ports. These controls allow the
      VIP to sample pixel data on the correct clock edge.
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      items:
        - description: phandle to device control module
        - description: offset to the CTRL_CORE_SMA_SW_1 register
        - description: Bit field to slice 0 port A
        - description: Bit field to slice 0 port B
        - description: Bit field to slice 1 port A
        - description: Bit field to slice 1 port B
    maxItems: 1

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    patternProperties:
      '^port@[0-3]$':
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description: |
          Each VIP instance supports 2 independently configurable external video
          input capture slices (Slice 0 and Slice 1) each providing up to two video
          input ports (Port A and Port B). These ports represent the following
          port@0 -> Slice 0 Port A
          port@1 -> Slice 0 Port B
          port@2 -> Slice 1 Port A
          port@3 -> Slice 1 Port B

        properties:
          endpoint:
            $ref: /schemas/media/video-interfaces.yaml#

Annotation

Implementation Notes