Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml
Extension
.yaml
Size
3564 bytes
Lines
136
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: FSL/NXP Integrated Flash Controller

maintainers:
  - Shawn Guo <shawnguo@kernel.org>

description: |
  NXP's integrated flash controller (IFC) is an advanced version of the
  enhanced local bus controller which includes similar programming and signal
  interfaces with an extended feature set. The IFC provides access to multiple
  external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM,
  SRAM and other memories where address and data are shared on a bus.

properties:
  $nodename:
    pattern: "^memory-controller@[0-9a-f]+$"

  compatible:
    const: fsl,ifc

  "#address-cells":
    enum: [2, 3]
    description: |
      Should be either two or three.  The first cell is the chipselect
      number, and the remaining cells are the offset into the chipselect.

  "#size-cells":
    enum: [1, 2]
    description: |
      Either one or two, depending on how large each chipselect can be.

  reg:
    maxItems: 1

  interrupts:
    minItems: 1
    maxItems: 2
    description: |
      IFC may have one or two interrupts.  If two interrupt specifiers are
      present, the first is the "common" interrupt (CM_EVTER_STAT), and the
      second is the NAND interrupt (NAND_EVTER_STAT).  If there is only one,
      that interrupt reports both types of event.

  little-endian:
    type: boolean
    description: |
      If this property is absent, the big-endian mode will be in use as default
      for registers.

  ranges:
    description: |
      Each range corresponds to a single chipselect, and covers the entire
      access window as configured.

patternProperties:
  "^nand@[a-f0-9]+(,[a-f0-9]+)+$":
    type: object
    properties:
      compatible:
        const: fsl,ifc-nand

      reg:
        maxItems: 1

      "#address-cells":

Annotation

Implementation Notes