Documentation/devicetree/bindings/memory-controllers/nuvoton,npcm-memory-controller.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/memory-controllers/nuvoton,npcm-memory-controller.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/memory-controllers/nuvoton,npcm-memory-controller.yaml- Extension
.yaml- Size
- 1246 bytes
- Lines
- 51
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/nuvoton,npcm-memory-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Nuvoton NPCM Memory Controller
maintainers:
- Marvin Lin <kflin@nuvoton.com>
- Stanley Chu <yschu@nuvoton.com>
description: |
The Nuvoton BMC SoC supports DDR4 memory with or without ECC (error correction
check).
The memory controller supports single bit error correction, double bit error
detection (in-line ECC in which a section (1/8th) of the memory device used to
store data is used for ECC storage).
Note, the bootloader must configure ECC mode for the memory controller.
properties:
compatible:
enum:
- nuvoton,npcm750-memory-controller
- nuvoton,npcm845-memory-controller
reg:
maxItems: 1
interrupts:
maxItems: 1
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
mc: memory-controller@f0824000 {
compatible = "nuvoton,npcm750-memory-controller";
reg = <0xf0824000 0x1000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
};
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.