Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
Extension
.yaml
Size
9541 bytes
Lines
401
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra186 (and later) SoC Memory Controller

maintainers:
  - Jon Hunter <jonathanh@nvidia.com>
  - Thierry Reding <thierry.reding@gmail.com>

description: |
  The NVIDIA Tegra186 SoC features a 128 bit memory controller that is split
  into four 32 bit channels to support LPDDR4 with x16 subpartitions. The MC
  handles memory requests for 40-bit virtual addresses from internal clients
  and arbitrates among them to allocate memory bandwidth.

  Up to 15 GiB of physical memory can be supported. Security features such as
  encryption of traffic to and from DRAM via general security apertures are
  available for video and other secure applications, as well as DRAM ECC for
  automotive safety applications (single bit error correction and double bit
  error detection).

properties:
  $nodename:
    pattern: "^memory-controller@[0-9a-f]+$"

  compatible:
    items:
      - enum:
          - nvidia,tegra186-mc
          - nvidia,tegra194-mc
          - nvidia,tegra234-mc
          - nvidia,tegra238-mc
          - nvidia,tegra264-mc

  reg:
    minItems: 6
    maxItems: 18

  reg-names:
    minItems: 6
    maxItems: 18

  interrupts:
    minItems: 1
    maxItems: 8

  interrupt-names:
    minItems: 1
    maxItems: 8

  "#address-cells":
    const: 2

  "#size-cells":
    const: 2

  ranges: true

  dma-ranges: true

  "#interconnect-cells":
    const: 1

patternProperties:
  "^external-memory-controller@[0-9a-f]+$":
    description:
      The bulk of the work involved in controlling the external memory

Annotation

Implementation Notes