Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml
Extension
.yaml
Size
1467 bytes
Lines
57
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas DDR Bus Controllers

maintainers:
  - Geert Uytterhoeven <geert+renesas@glider.be>

description: |
  Renesas SoCs contain one or more memory controllers.  These memory
  controllers differ from one SoC variant to another, and are called by
  different names, e.g. "DDR Bus Controller (DBSC)", "DDR3 Bus State Controller
  (DBSC3)", or "SDRAM Bus State Controller (SBSC)").

properties:
  compatible:
    enum:
      - renesas,dbsc-r8a73a4  # R-Mobile APE6
      - renesas,dbsc3-r8a7740 # R-Mobile A1
      - renesas,sbsc-sh73a0   # SH-Mobile AG5

  reg:
    maxItems: 1

  interrupts:
    maxItems: 2

  interrupt-names:
    items:
      - const: sec  # secure interrupt
      - const: temp # normal (temperature) interrupt

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - power-domains

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    sbsc1: memory-controller@fe400000 {
            compatible = "renesas,sbsc-sh73a0";
            reg = <0xfe400000 0x400>;
            interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-names = "sec", "temp";
            power-domains = <&pd_a4bc0>;
    };

Annotation

Implementation Notes