Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml
Extension
.yaml
Size
13319 bytes
Lines
385
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# %YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip rk3399 DMC (Dynamic Memory Controller) device

maintainers:
  - Brian Norris <briannorris@chromium.org>

properties:
  compatible:
    enum:
      - rockchip,rk3399-dmc

  devfreq-events:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Node to get DDR loading. Refer to
      Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml.

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: dmc_clk

  operating-points-v2: true

  center-supply:
    description:
      DMC regulator supply.

  rockchip,pmu:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the syscon managing the "PMU general register files".

  interrupts:
    maxItems: 1
    description:
      The CPU interrupt number. It should be a DCF interrupt. When DDR DVFS
      finishes, a DCF interrupt is triggered.

  rockchip,ddr3_speed_bin:
    deprecated: true
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      For values, reference include/dt-bindings/clock/rk3399-ddr.h. Selects the
      DDR3 cl-trp-trcd type. It must be set according to "Speed Bin" in DDR3
      datasheet; DO NOT use a smaller "Speed Bin" than specified for the DDR3
      being used.

  rockchip,pd_idle:
    deprecated: true
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Configure the PD_IDLE value. Defines the power-down idle period in which
      memories are placed into power-down mode if bus is idle for PD_IDLE DFI
      clock cycles.
      See also rockchip,pd-idle-ns.

  rockchip,sr_idle:
    deprecated: true
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Configure the SR_IDLE value. Defines the self-refresh idle period in
      which memories are placed into self-refresh mode if bus is idle for

Annotation

Implementation Notes