Documentation/devicetree/bindings/mfd/ti,tps6594.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mfd/ti,tps6594.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mfd/ti,tps6594.yaml- Extension
.yaml- Size
- 5603 bytes
- Lines
- 197
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/ti,tps6594.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI TPS6594 Power Management Integrated Circuit
maintainers:
- Julien Panis <jpanis@baylibre.com>
description:
TPS6594 is a Power Management IC which provides regulators and others
features like GPIOs, RTC, watchdog, ESMs (Error Signal Monitor), and
PFSM (Pre-configurable Finite State Machine) managing the state of the device.
TPS6594 is the super-set device while TPS6593 and LP8764 are derivatives.
properties:
compatible:
enum:
- ti,lp8764-q1
- ti,tps6593-q1
- ti,tps6594-q1
- ti,tps65224-q1
- ti,tps652g1
reg:
description: I2C slave address or SPI chip select number.
maxItems: 1
ti,primary-pmic:
type: boolean
description: |
Identify the primary PMIC on SPMI bus.
A multi-PMIC synchronization scheme is implemented in the PMIC device
to synchronize the power state changes with other PMIC devices. This is
accomplished through a SPMI bus: the primary PMIC is the controller
device on the SPMI bus, and the secondary PMICs are the target devices
on the SPMI bus.
system-power-controller: true
gpio-controller: true
gpio-line-names: true
'#gpio-cells':
const: 2
description: |
The first cell is the pin number, the second cell is used to specify flags.
See ../gpio/gpio.txt for more information.
interrupts:
maxItems: 1
regulators:
type: object
description: List of regulators provided by this controller.
patternProperties:
"^buck([1-5]|12|34|123|1234)$":
type: object
$ref: /schemas/regulator/regulator.yaml#
unevaluatedProperties: false
"^ldo[1-4]$":
type: object
$ref: /schemas/regulator/regulator.yaml#
unevaluatedProperties: false
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.