Documentation/devicetree/bindings/mips/brcm/soc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mips/brcm/soc.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/mips/brcm/soc.yaml
Extension
.yaml
Size
2911 bytes
Lines
121
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mips/brcm/soc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom cable/DSL/settop platforms

maintainers:
  - Florian Fainelli <f.fainelli@gmail.com>

description: |
    Boards Broadcom cable/DSL/settop SoC shall have the following properties.
    The experimental -viper variants are for running Linux on the 3384's
    BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.

properties:
  $nodename:
    const: '/'

  compatible:
    enum:
      - brcm,bcm3368
      - brcm,bcm3384
      - brcm,bcm33843
      - brcm,bcm3384-viper
      - brcm,bcm33843-viper
      - brcm,bcm6328
      - brcm,bcm6358
      - brcm,bcm6362
      - brcm,bcm6368
      - brcm,bcm63168
      - brcm,bcm63268
      - brcm,bcm7125
      - brcm,bcm7346
      - brcm,bcm7358
      - brcm,bcm7360
      - brcm,bcm7362
      - brcm,bcm7420
      - brcm,bcm7425

  cpus:
    type: object
    additionalProperties: false
    properties:
      '#address-cells':
        const: 1

      '#size-cells':
        const: 0

      mips-hpt-frequency:
        description: MIPS counter high precision timer frequency.
         This is common to all CPUs in the system so it lives
         under the "cpus" node.
        $ref: /schemas/types.yaml#/definitions/uint32

      brcm,bmips-cbr-reg:
        description: Reference address of the CBR.
          Some SoC suffer from a BUG where CBR(Core Base Register)
          address might be badly or never initialized by the Bootloader
          or reading it from co-processor registers, if the system boots
          from secondary CPU, results in invalid address.
          The CBR address is always the same on the SoC hence it
          can be provided in DT to handle these broken case.
        $ref: /schemas/types.yaml#/definitions/uint32

    patternProperties:
      "^cpu@[0-9]$":
        type: object

Annotation

Implementation Notes