Documentation/devicetree/bindings/misc/aspeed,ast2400-cvic.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/misc/aspeed,ast2400-cvic.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/misc/aspeed,ast2400-cvic.yaml- Extension
.yaml- Size
- 1612 bytes
- Lines
- 61
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/misc/aspeed,ast2400-cvic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Aspeed Coprocessor Vectored Interrupt Controller
maintainers:
- Andrew Jeffery <andrew@codeconstruct.com.au>
description:
The Aspeed AST2400 and AST2500 SoCs have a controller that provides interrupts
to the ColdFire coprocessor. It's not a normal interrupt controller and it
would be rather inconvenient to create an interrupt tree for it, as it
somewhat shares some of the same sources as the main ARM interrupt controller
but with different numbers.
The AST2500 also supports a software generated interrupt.
properties:
compatible:
items:
- enum:
- aspeed,ast2400-cvic
- aspeed,ast2500-cvic
- const: aspeed,cvic
reg:
maxItems: 1
valid-sources:
$ref: /schemas/types.yaml#/definitions/uint32-array
maxItems: 1
description:
A bitmap of supported sources for the implementation.
copro-sw-interrupts:
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1
maxItems: 32
description:
A list of interrupt numbers that can be used as software interrupts from
the ARM to the coprocessor.
required:
- compatible
- reg
- valid-sources
additionalProperties: false
examples:
- |
interrupt-controller@1e6c2000 {
compatible = "aspeed,ast2500-cvic", "aspeed,cvic";
reg = <0x1e6c2000 0x80>;
valid-sources = <0xffffffff>;
copro-sw-interrupts = <1>;
};
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.