Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml- Extension
.yaml- Size
- 2603 bytes
- Lines
- 99
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/histb-clock.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/hisilicon,hi3798cv200-dw-mshc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Hisilicon HiSTB SoCs specific extensions to the Synopsys DWMMC controller
maintainers:
- Yang Xiwen <forbidden405@outlook.com>
properties:
compatible:
enum:
- hisilicon,hi3798cv200-dw-mshc
- hisilicon,hi3798mv200-dw-mshc
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: bus interface unit clock
- description: card interface unit clock
- description: card input sample phase clock
- description: controller output drive phase clock
clock-names:
items:
- const: ciu
- const: biu
- const: ciu-sample
- const: ciu-drive
hisilicon,sap-dll-reg:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: |
DWMMC core on Hi3798MV2x SoCs has a delay-locked-loop(DLL) attached to card data input path.
It is integrated into CRG core on the SoC and has to be controlled during tuning
items:
- items:
- description: A phandle pointed to the CRG syscon node
- description: Sample DLL register offset in CRG address space
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
allOf:
- $ref: synopsys-dw-mshc-common.yaml#
- if:
properties:
compatible:
contains:
const: hisilicon,hi3798mv200-dw-mshc
then:
required:
- hisilicon,sap-dll-reg
else:
properties:
hisilicon,sap-dll-reg: false
unevaluatedProperties: false
Annotation
- Immediate include surface: `dt-bindings/clock/histb-clock.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.