Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml- Extension
.yaml- Size
- 7178 bytes
- Lines
- 261
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell Xenon SDHCI Controller
description: |
This file documents differences between the core MMC properties described by
mmc-controller.yaml and the properties used by the Xenon implementation.
Multiple SDHCs might be put into a single Xenon IP, to save size and cost.
Each SDHC is independent and owns independent resources, such as register
sets, clock and PHY.
Each SDHC should have an independent device tree node.
maintainers:
- Ulf Hansson <ulf.hansson@linaro.org>
properties:
compatible:
oneOf:
- enum:
- marvell,armada-cp110-sdhci
- marvell,armada-ap806-sdhci
- items:
- enum:
- marvell,armada-ap807-sdhci
- marvell,ac5-sdhci
- const: marvell,armada-ap806-sdhci
- items:
- const: marvell,armada-3700-sdhci
- const: marvell,sdhci-xenon
reg:
minItems: 1
items:
- description: Xenon IP registers
- description: Armada 3700 SoC PHY PAD Voltage Control register
clocks:
minItems: 1
maxItems: 2
clock-names:
minItems: 1
items:
- const: core
- const: axi
dma-coherent: true
interrupts:
maxItems: 1
iommus:
maxItems: 1
marvell,pad-type:
$ref: /schemas/types.yaml#/definitions/string
enum:
- sd
- fixed-1-8v
description:
Type of Armada 3700 SoC PHY PAD Voltage Controller register. If "sd" is
selected, SoC PHY PAD is set as 3.3V at the beginning and is switched to
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.