Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml- Extension
.yaml- Size
- 1578 bytes
- Lines
- 68
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/clock/microchip,sparx5.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/microchip,dw-sparx5-sdhci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip Sparx5 Mobile Storage Host Controller
allOf:
- $ref: mmc-controller.yaml
maintainers:
- Lars Povlsen <lars.povlsen@microchip.com>
# Everything else is described in the common file
properties:
compatible:
const: microchip,dw-sparx5-sdhci
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
description:
Handle to "core" clock for the sdhci controller.
clock-names:
items:
- const: core
microchip,clock-delay:
description: Delay clock to card to meet setup time requirements.
Each step increase by 1.25ns.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 15
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/microchip,sparx5.h>
sdhci0: mmc@600800000 {
compatible = "microchip,dw-sparx5-sdhci";
reg = <0x00800000 0x1000>;
pinctrl-0 = <&emmc_pins>;
pinctrl-names = "default";
clocks = <&clks CLK_ID_AUX1>;
clock-names = "core";
assigned-clocks = <&clks CLK_ID_AUX1>;
assigned-clock-rates = <800000000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <8>;
microchip,clock-delay = <10>;
};
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/clock/microchip,sparx5.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.