Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml- Extension
.yaml- Size
- 9761 bytes
- Lines
- 314
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/clock/tegra210-car.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra Secure Digital Host Controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
description: |
This controller on Tegra family SoCs provides an interface for MMC, SD, and
SDIO types of memory cards.
This file documents differences between the core properties described by
mmc-controller.yaml and the properties for the Tegra SDHCI controller.
properties:
compatible:
oneOf:
- enum:
- nvidia,tegra20-sdhci
- nvidia,tegra30-sdhci
- nvidia,tegra114-sdhci
- nvidia,tegra124-sdhci
- nvidia,tegra210-sdhci
- nvidia,tegra186-sdhci
- nvidia,tegra194-sdhci
- items:
- const: nvidia,tegra132-sdhci
- const: nvidia,tegra124-sdhci
- items:
- enum:
- nvidia,tegra194-sdhci
- nvidia,tegra234-sdhci
- const: nvidia,tegra186-sdhci
reg:
maxItems: 1
interrupts:
maxItems: 1
assigned-clocks: true
assigned-clock-parents: true
assigned-clock-rates: true
clocks:
minItems: 1
maxItems: 2
clock-names:
minItems: 1
maxItems: 2
resets:
items:
- description: module reset
reset-names:
items:
- const: sdhci
power-gpios:
description: specify GPIOs for power control
maxItems: 1
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/clock/tegra210-car.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.