Documentation/devicetree/bindings/mmc/sprd,sdhci-r11.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mmc/sprd,sdhci-r11.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mmc/sprd,sdhci-r11.yaml- Extension
.yaml- Size
- 2856 bytes
- Lines
- 113
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/sprd,sc9860-clk.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Spreadtrum SDHCI controller
maintainers:
- Orson Zhai <orsonzhai@gmail.com>
- Baolin Wang <baolin.wang7@gmail.com>
- Chunyan Zhang <zhang.lyra@gmail.com>
properties:
compatible:
const: sprd,sdhci-r11
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 2
items:
- description: SDIO source clock
- description: gate clock for enabling/disabling the device
- description: gate clock controlling the device for some special platforms (optional)
clock-names:
minItems: 2
items:
- const: sdio
- const: enable
- const: 2x_enable
pinctrl-0:
description: default/high speed pin control
maxItems: 1
pinctrl-1:
description: UHS mode pin control
maxItems: 1
pinctrl-names:
minItems: 1
items:
- const: default
- const: state_uhs
patternProperties:
"^sprd,phy-delay-(legacy|mmc-(ddr52|highspeed|hs[24]00|hs400es)|sd-(highspeed|uhs-sdr(50|104)))$":
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
- description: clock data write line delay value
- description: clock read command line delay value
- description: clock read data positive edge delay value
- description: clock read data negative edge delay value
description:
PHY DLL delays are used to delay the data valid window, and align
the window to the sampling clock. Each cell's delay value unit is
cycle of the PHY clock.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
Annotation
- Immediate include surface: `dt-bindings/clock/sprd,sc9860-clk.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.