Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml- Extension
.yaml- Size
- 2190 bytes
- Lines
- 103
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/clock/tegra20-car.hdt-bindings/gpio/tegra-gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/nvidia,tegra20-nand.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra NAND Flash Controller
maintainers:
- Jonathan Hunter <jonathanh@nvidia.com>
allOf:
- $ref: nand-controller.yaml
description:
The NVIDIA NAND controller provides an interface between NVIDIA SoCs
and raw NAND flash devices. It supports standard NAND operations,
hardware-assisted ECC, OOB data access, and DMA transfers, and
integrates with the Linux MTD NAND subsystem for reliable flash management.
properties:
compatible:
const: nvidia,tegra20-nand
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: nand
resets:
maxItems: 1
reset-names:
items:
- const: nand
power-domains:
maxItems: 1
operating-points-v2:
maxItems: 1
patternProperties:
'^nand@':
type: object
description: Individual NAND chip connected to the NAND controller
$ref: raw-nand-chip.yaml#
properties:
reg:
maximum: 5
unevaluatedProperties: false
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- resets
- reset-names
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/clock/tegra20-car.h`, `dt-bindings/gpio/tegra-gpio.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.