Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml- Extension
.yaml- Size
- 3132 bytes
- Lines
- 127
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/ti,davinci-nand.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI DaVinci NAND controller
maintainers:
- Marcus Folkesson <marcus.folkesson@gmail.com>
allOf:
- $ref: nand-controller.yaml
properties:
compatible:
enum:
- ti,davinci-nand
- ti,keystone-nand
reg:
items:
- description: Access window.
- description: AEMIF control registers.
partitions:
type: object
required:
- compatible
ti,davinci-chipselect:
description:
Number of chipselect. Indicate on the davinci_nand driver which
chipselect is used for accessing the nand.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
ti,davinci-mask-ale:
description:
Mask for ALE. Needed for executing address phase. These offset will be
added to the base address for the chip select space the NAND Flash
device is connected to.
$ref: /schemas/types.yaml#/definitions/uint32
default: 0x08
ti,davinci-mask-cle:
description:
Mask for CLE. Needed for executing command phase. These offset will be
added to the base address for the chip select space the NAND Flash device
is connected to.
$ref: /schemas/types.yaml#/definitions/uint32
default: 0x10
ti,davinci-mask-chipsel:
description:
Mask for chipselect address. Needed to mask addresses for given
chipselect.
$ref: /schemas/types.yaml#/definitions/uint32
default: 0
ti,davinci-ecc-bits:
description: Used ECC bits.
enum: [1, 4]
ti,davinci-ecc-mode:
description: Operation mode of the NAND ECC mode.
$ref: /schemas/types.yaml#/definitions/string
enum: [none, soft, hw, on-die]
deprecated: true
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.