Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml- Extension
.yaml- Size
- 4679 bytes
- Lines
- 179
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Altera SOCFPGA SoC DWMAC controller
maintainers:
- Matthew Gerlach <matthew.gerlach@altera.com>
description:
This binding describes the Altera SOCFPGA SoC implementation of the
Synopsys DWMAC for the Cyclone5, Arria5, Stratix10, Agilex5 and Agilex7
families of chips.
# TODO: Determine how to handle the Arria10 reset-name, stmmaceth-ocp, that
# does not validate against net/snps,dwmac.yaml.
select:
properties:
compatible:
contains:
enum:
- altr,socfpga-stmmac
- altr,socfpga-stmmac-a10-s10
- altr,socfpga-stmmac-agilex5
required:
- compatible
properties:
compatible:
oneOf:
- items:
- const: altr,socfpga-stmmac
- const: snps,dwmac-3.70a
- const: snps,dwmac
- items:
- const: altr,socfpga-stmmac-a10-s10
- const: snps,dwmac-3.72a
- const: snps,dwmac
- items:
- const: altr,socfpga-stmmac-a10-s10
- const: snps,dwmac-3.74a
- const: snps,dwmac
- items:
- const: altr,socfpga-stmmac-agilex5
- const: snps,dwxgmac-2.10
clocks:
minItems: 1
items:
- description: GMAC main clock
- description:
PTP reference clock. This clock is used for programming the
Timestamp Addend Register. If not passed then the system
clock will be used and this is fine on some platforms.
clock-names:
minItems: 1
items:
- const: stmmaceth
- const: ptp_ref
interrupts:
maxItems: 1
interrupt-names:
items:
- const: macirq
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.