Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml- Extension
.yaml- Size
- 3446 bytes
- Lines
- 136
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/clock/r9a06g032-sysctrl.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips)
maintainers:
- Wolfgang Grandegger <wg@grandegger.com>
properties:
compatible:
oneOf:
- enum:
- nxp,sja1000
- technologic,sja1000
- items:
- const: renesas,r9a06g032-sja1000 # RZ/N1D
- const: renesas,rzn1-sja1000 # RZ/N1
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
power-domains:
maxItems: 1
reg-io-width:
description: I/O register width (in bytes) implemented by this device
default: 1
enum: [ 1, 2, 4 ]
nxp,external-clock-frequency:
$ref: /schemas/types.yaml#/definitions/uint32
default: 16000000
description: |
Frequency of the external oscillator clock in Hz.
The internal clock frequency used by the SJA1000 is half of that value.
nxp,tx-output-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 0, 1, 2, 3 ]
default: 1
description: |
operation mode of the TX output control logic. Valid values are:
<0> : bi-phase output mode
<1> : normal output mode (default)
<2> : test output mode
<3> : clock output mode
nxp,tx-output-config:
$ref: /schemas/types.yaml#/definitions/uint32
default: 0x02
description: |
TX output pin configuration. Valid values are any one of the below
or combination of TX0 and TX1:
<0x01> : TX0 invert
<0x02> : TX0 pull-down (default)
<0x04> : TX0 pull-up
<0x06> : TX0 push-pull
<0x08> : TX1 invert
<0x10> : TX1 pull-down
<0x20> : TX1 pull-up
<0x30> : TX1 push-pull
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/clock/r9a06g032-sysctrl.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.