Documentation/devicetree/bindings/net/cavium-pip.txt
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/cavium-pip.txt
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/net/cavium-pip.txt- Extension
.txt- Size
- 2694 bytes
- Lines
- 100
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: documentation
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
The PIP Ethernet nexus can control several data packet input/output
devices. The devices have a two level grouping scheme. There may be
several interfaces, and each interface may have several ports. These
ports might be an individual Ethernet PHY.
Properties for the PIP nexus:
- compatible: "cavium,octeon-3860-pip"
Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
- reg: The base address of the PIP's register bank.
- #address-cells: Must be <1>.
- #size-cells: Must be <0>.
Properties for PIP interfaces which is a child the PIP nexus:
- compatible: "cavium,octeon-3860-pip-interface"
Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
- reg: The interface number.
- #address-cells: Must be <1>.
- #size-cells: Must be <0>.
Properties for PIP port which is a child the PIP interface:
- compatible: "cavium,octeon-3860-pip-port"
Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
- reg: The port number within the interface group.
- phy-handle: Optional, see ethernet.txt file in the same directory.
- rx-delay: Delay value for RGMII receive clock. Optional. Disabled if 0.
Value range is 1-31, and mapping to the actual delay varies depending on HW.
- tx-delay: Delay value for RGMII transmit clock. Optional. Disabled if 0.
Value range is 1-31, and mapping to the actual delay varies depending on HW.
Example:
pip@11800a0000000 {
compatible = "cavium,octeon-3860-pip";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0xa0000000 0x0 0x2000>;
interface@0 {
compatible = "cavium,octeon-3860-pip-interface";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* interface */
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>; /* Port */
local-mac-address = [ 00 0f b7 10 63 60 ];
phy-handle = <&phy2>;
};
ethernet@1 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x1>; /* Port */
local-mac-address = [ 00 0f b7 10 63 61 ];
phy-handle = <&phy3>;
};
ethernet@2 {
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.