Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml

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Linux kernel
Corpus path
Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml
Extension
.yaml
Size
3853 bytes
Lines
161
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/maxlinear,mxl862xx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MaxLinear MxL862xx Ethernet Switch Family

maintainers:
  - Daniel Golle <daniel@makrotopia.org>

description:
  The MaxLinear MxL862xx switch family are multi-port Ethernet switches with
  integrated 2.5GE PHYs. The MxL86252 has five PHY ports and the MxL86282
  has eight PHY ports. Both models come with two 10 Gigabit/s SerDes
  interfaces to be used to connect external PHYs or SFP cages, or as CPU
  port.

allOf:
  - $ref: dsa.yaml#/$defs/ethernet-ports

properties:
  compatible:
    enum:
      - maxlinear,mxl86252
      - maxlinear,mxl86282

  reg:
    maxItems: 1
    description: MDIO address of the switch

  mdio:
    $ref: /schemas/net/mdio.yaml#
    unevaluatedProperties: false

required:
  - compatible
  - mdio
  - reg

unevaluatedProperties: false

examples:
  - |
    mdio {
        #address-cells = <1>;
        #size-cells = <0>;

        switch@0 {
            compatible = "maxlinear,mxl86282";
            reg = <0>;

            ethernet-ports {
                #address-cells = <1>;
                #size-cells = <0>;

                /* Microcontroller port */
                port@0 {
                    reg = <0>;
                    status = "disabled";
                };

                port@1 {
                    reg = <1>;
                    phy-handle = <&phy0>;
                    phy-mode = "internal";
                };

                port@2 {
                    reg = <2>;

Annotation

Implementation Notes