Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml- Extension
.yaml- Size
- 3802 bytes
- Lines
- 153
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/gpio/gpio.hdt-bindings/clock/r9a06g032-sysctrl.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/N1 Advanced 5 ports ethernet switch
maintainers:
- Clément Léger <clement.leger@bootlin.com>
description: |
The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and
handles 4 ports + 1 CPU management port.
allOf:
- $ref: dsa.yaml#/$defs/ethernet-ports
properties:
compatible:
items:
- enum:
- renesas,r9a06g032-a5psw
- const: renesas,rzn1-a5psw
reg:
maxItems: 1
interrupts:
items:
- description: Device Level Ring (DLR) interrupt
- description: Switch interrupt
- description: Parallel Redundancy Protocol (PRP) interrupt
- description: Integrated HUB module interrupt
- description: Receive Pattern Match interrupt
interrupt-names:
items:
- const: dlr
- const: switch
- const: prp
- const: hub
- const: ptrn
power-domains:
maxItems: 1
mdio:
$ref: /schemas/net/mdio.yaml#
unevaluatedProperties: false
clocks:
items:
- description: AHB clock used for the switch register interface
- description: Switch system clock
clock-names:
items:
- const: hclk
- const: clk
ethernet-ports:
type: object
additionalProperties: true
patternProperties:
"^(ethernet-)?port@[0-4]$":
type: object
additionalProperties: true
properties:
pcs-handle:
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `dt-bindings/clock/r9a06g032-sysctrl.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.