Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.yaml- Extension
.yaml- Size
- 4844 bytes
- Lines
- 195
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/vitesse,vsc73xx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Vitesse VSC73xx DSA Switches
maintainers:
- Linus Walleij <linusw@kernel.org>
description:
The Vitesse DSA Switches were produced in the early-to-mid 2000s.
The Vitesse company has been acquired by Microsemi and Microsemi has
been acquired Microchip but the new owner retains this vendor branding.
The currently supported switch chips are
Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
This switch can use one of two different management interfaces.
If SPI interface is used, the device tree node is an SPI device so it must
reside inside a SPI bus device tree node, see spi/spi-bus.txt
When the chip is connected to a parallel memory bus and work in memory-mapped
I/O mode, a platform device is used to represent the vsc73xx. In this case it
must reside inside a platform bus device tree node.
properties:
compatible:
enum:
- vitesse,vsc7385
- vitesse,vsc7388
- vitesse,vsc7395
- vitesse,vsc7398
reg:
maxItems: 1
gpio-controller: true
"#gpio-cells":
const: 2
reset-gpios:
description: GPIO to be used to reset the whole device
maxItems: 1
allOf:
- $ref: dsa.yaml#/$defs/ethernet-ports
patternProperties:
"^(ethernet-)?ports$":
additionalProperties: true
patternProperties:
"^(ethernet-)?port@6$":
allOf:
- if:
properties:
phy-mode:
contains:
enum:
- rgmii
then:
properties:
rx-internal-delay-ps:
$ref: "#/$defs/internal-delay-ps"
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.