Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml- Extension
.yaml- Size
- 3536 bytes
- Lines
- 124
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2021 Linaro Ltd.
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel IXP4xx V.35 WAN High Speed Serial Link (HSS)
maintainers:
- Linus Walleij <linusw@kernel.org>
description: |
The Intel IXP4xx HSS makes use of the IXP4xx NPE (Network
Processing Engine) and the IXP4xx Queue Manager to process
V.35 Wideband Modem (WAN) links.
properties:
compatible:
const: intel,ixp4xx-hss
reg:
maxItems: 1
description: The HSS instance
intel,npe-handle:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
items:
- description: phandle to the NPE this HSS instance is using
- description: the NPE instance number
description: phandle to the NPE this HSS instance is using
and the instance to use in the second cell
intel,queue-chl-rxtrig:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to the RX trigger queue on the NPE
- description: the queue instance number
description: phandle to the RX trigger queue on the NPE
intel,queue-chl-txready:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to the TX ready queue on the NPE
- description: the queue instance number
description: phandle to the TX ready queue on the NPE
intel,queue-pkt-rx:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to the RX queue on the NPE
- description: the queue instance number
description: phandle to the packet RX queue on the NPE
intel,queue-pkt-tx:
$ref: /schemas/types.yaml#/definitions/phandle-array
maxItems: 4
items:
items:
- description: phandle to the TX queue on the NPE
- description: the queue instance number
description: phandle to the packet TX0, TX1, TX2 and TX3 queues on the NPE
intel,queue-pkt-rxfree:
$ref: /schemas/types.yaml#/definitions/phandle-array
maxItems: 4
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.