Documentation/devicetree/bindings/net/micrel,gigabit.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/micrel,gigabit.yaml

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Linux kernel
Corpus path
Documentation/devicetree/bindings/net/micrel,gigabit.yaml
Extension
.yaml
Size
7842 bytes
Lines
254
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/micrel,gigabit.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Micrel series Gigabit Ethernet PHYs

maintainers:
  - Andrew Lunn <andrew@lunn.ch>
  - Stefan Eichenberger <eichest@gmail.com>

description:
  Some boards require special skew tuning values, particularly when it comes
  to clock delays. These values can be specified in the device tree using
  the properties listed here.

properties:
  compatible:
    enum:
      - ethernet-phy-id0022.1610  # KSZ9021
      - ethernet-phy-id0022.1611  # KSZ9021RLRN
      - ethernet-phy-id0022.1620  # KSZ9031
      - ethernet-phy-id0022.1631  # KSZ9477
      - ethernet-phy-id0022.1640  # KSZ9131
      - ethernet-phy-id0022.1650  # LAN8841
      - ethernet-phy-id0022.1660  # LAN8814
      - ethernet-phy-id0022.1670  # LAN8804

  micrel,force-master:
    type: boolean
    description: |
      Force phy to master mode. Only set this option if the phy reference
      clock provided at CLK125_NDO pin is used as MAC reference clock
      because the clock jitter in slave mode is too high (errata#2).
      Attention: The link partner must be configurable as slave otherwise
      no link will be established.

  coma-mode-gpios:
    maxItems: 1
    description: |
      If present the given gpio will be deasserted when the PHY is probed.

      Some PHYs have a COMA mode input pin which puts the PHY into
      isolate and power-down mode. On some boards this input is connected
      to a GPIO of the SoC.

  micrel,led-mode:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: |
      LED mode value to set for PHYs with configurable LEDs.

      Configure the LED mode with single value. The list of PHYs and the
      bits that are currently supported:

      LAN8814: register EP5.0, bit 6

      See the respective PHY datasheet for the mode values.
    minimum: 0
    maximum: 1

patternProperties:
  '^([rt]xc)-skew-psec$':
    $ref: /schemas/types.yaml#/definitions/int32
    description:
      Skew control of the pad in picoseconds.
    minimum: -700
    maximum: 2400
    multipleOf: 100
    default: 0

Annotation

Implementation Notes