Documentation/devicetree/bindings/net/qcom,qca807x.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/qcom,qca807x.yaml

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Linux kernel
Corpus path
Documentation/devicetree/bindings/net/qcom,qca807x.yaml
Extension
.yaml
Size
5054 bytes
Lines
185
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/qcom,qca807x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm QCA807x Ethernet PHY

maintainers:
  - Christian Marangi <ansuelsmth@gmail.com>
  - Robert Marko <robert.marko@sartura.hr>

description: |
  Qualcomm QCA8072/5 Ethernet PHY is PHY package of 2 or 5
  IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
  1000BASE-T PHY-s.

  They feature 2 SerDes, one for PSGMII or QSGMII connection with
  MAC, while second one is SGMII for connection to MAC or fiber.

  Both models have a combo port that supports 1000BASE-X and
  100BASE-FX fiber.

  Each PHY inside of QCA807x series has 4 digitally controlled
  output only pins that natively drive LED-s for up to 2 attached
  LEDs. Some vendor also use these 4 output for GPIO usage without
  attaching LEDs.

  Note that output pins can be set to drive LEDs OR GPIO, mixed
  definition are not accepted.

$ref: ethernet-phy-package.yaml#

properties:
  compatible:
    enum:
      - qcom,qca8072-package
      - qcom,qca8075-package

  qcom,package-mode:
    description: |
      PHY package can be configured in 3 mode following this table:

                    First Serdes mode       Second Serdes mode
      Option 1      PSGMII for copper       Disabled
                    ports 0-4
      Option 2      PSGMII for copper       1000BASE-X / 100BASE-FX
                    ports 0-4
      Option 3      QSGMII for copper       SGMII for
                    ports 0-3               copper port 4

      PSGMII mode (option 1 or 2) is configured dynamically based on
      the presence of a connected SFP device.
    $ref: /schemas/types.yaml#/definitions/string
    enum:
      - qsgmii
      - psgmii
    default: psgmii

  qcom,tx-drive-strength-milliwatt:
    description: set the TX Amplifier value in mv.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [140, 160, 180, 200, 220,
           240, 260, 280, 300, 320,
           400, 500, 600]
    default: 600

patternProperties:
  ^ethernet-phy@[a-f0-9]+$:
    $ref: ethernet-phy.yaml#

Annotation

Implementation Notes