Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml

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Linux kernel
Corpus path
Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
Extension
.yaml
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9019 bytes
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325
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: The TI AM654x/J721E/AM642x SoC Gigabit Ethernet MAC (Media Access Controller)

maintainers:
  - Siddharth Vadapalli <s-vadapalli@ti.com>
  - Roger Quadros <rogerq@kernel.org>

description:
  The TI AM654x/J721E SoC Gigabit Ethernet MAC (CPSW2G NUSS) has two ports
  (one external) and provides Ethernet packet communication for the device.
  The TI AM642x SoC Gigabit Ethernet MAC (CPSW3G NUSS) has three ports
  (two external) and provides Ethernet packet communication and switching.

  The internal Communications Port Programming Interface (CPPI5) (Host port 0).
  Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels
  and one RX channels and operating by NAVSS Unified DMA  Peripheral Root
  Complex (UDMA-P) controller.

  CPSWxG features
  updated Address Lookup Engine (ALE).
  priority level Quality Of Service (QOS) support (802.1p)
  Support for Audio/Video Bridging (P802.1Qav/D6.0)
  Support for IEEE 1588 Clock Synchronization (2008 Annex D, Annex E and Annex F)
  Flow Control (802.3x) Support
  Time Sensitive Network Support
  IEEE P902.3br/D2.0 Interspersing Express Traffic
  IEEE 802.1Qbv/D2.2 Enhancements for Scheduled Traffic
  Configurable number of addresses plus VLANs
  Configurable number of classifier/policers
  VLAN support, 802.1Q compliant, Auto add port VLAN for untagged frames on
  ingress, Auto VLAN removal on egress and auto pad to minimum frame size.
  RX/TX csum offload
  Management Data Input/Output (MDIO) interface for PHYs management
  RMII/RGMII Interfaces support
  new version of Common Platform Time Sync (CPTS)

  The CPSWxG NUSS is integrated into
    device MCU domain named MCU_CPSW0 on AM654x/J721E SoC.
    device MAIN domain named CPSW0 on AM642x SoC.

  Specifications can be found at
    https://www.ti.com/lit/pdf/spruid7
    https://www.ti.com/lit/zip/spruil1
    https://www.ti.com/lit/pdf/spruim2

properties:
  "#address-cells": true
  "#size-cells": true

  compatible:
    oneOf:
      - enum:
          - ti,am642-cpsw-nuss
          - ti,am654-cpsw-nuss
          - ti,j7200-cpswxg-nuss
          - ti,j721e-cpsw-nuss
          - ti,j721e-cpswxg-nuss
          - ti,j784s4-cpswxg-nuss
      - items:
          - enum:
              - ti,j722s-cpsw-nuss
          - const: ti,am642-cpsw-nuss

  reg:
    maxItems: 1

Annotation

Implementation Notes