Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml- Extension
.yaml- Size
- 6108 bytes
- Lines
- 201
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: AXI 1G/2.5G Ethernet Subsystem
description: |
Also called AXI 1G/2.5G Ethernet Subsystem, the xilinx axi ethernet IP core
provides connectivity to an external ethernet PHY supporting different
interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two
segments of memory for buffering TX and RX, as well as the capability of
offloading TX/RX checksum calculation off the processor.
Management configuration is done through the AXI interface, while payload is
sent and received through means of an AXI DMA controller. This driver
includes the DMA driver code, so this driver is incompatible with AXI DMA
driver.
maintainers:
- Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
properties:
compatible:
enum:
- xlnx,axi-ethernet-1.00.a
- xlnx,axi-ethernet-1.01.a
- xlnx,axi-ethernet-2.01.a
reg:
description:
Address and length of the IO space, as well as the address
and length of the AXI DMA controller IO space, unless
axistream-connected is specified, in which case the reg
attribute of the node referenced by it is used.
minItems: 1
maxItems: 2
interrupts:
items:
- description: Ethernet core interrupt
- description: Tx DMA interrupt
- description: Rx DMA interrupt
description:
Ethernet core interrupt is optional. If axistream-connected property is
present DMA node should contains TX/RX DMA interrupts else DMA interrupt
resources are mentioned on ethernet node.
minItems: 1
phy-handle: true
xlnx,rxmem:
description:
Set to allocated memory buffer for Rx/Tx in the hardware.
$ref: /schemas/types.yaml#/definitions/uint32
phy-mode:
enum:
- mii
- gmii
- rgmii
- sgmii
- 1000base-x
xlnx,phy-type:
description:
Do not use, but still accepted in preference to phy-mode.
deprecated: true
$ref: /schemas/types.yaml#/definitions/uint32
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.