Documentation/devicetree/bindings/nvmem/google,gs101-otp.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/nvmem/google,gs101-otp.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/nvmem/google,gs101-otp.yaml- Extension
.yaml- Size
- 1313 bytes
- Lines
- 62
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/google,gs101.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/google,gs101-otp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Google GS101 OTP Controller
maintainers:
- Tudor Ambarus <tudor.ambarus@linaro.org>
description: |
OTP controller drives a NVMEM memory where system or user specific data
can be stored. The OTP controller register space is of interest as well
because it contains dedicated registers where it stores the Product ID
and the Chip ID (apart other things like TMU or ASV info).
allOf:
- $ref: nvmem.yaml#
properties:
compatible:
items:
- const: google,gs101-otp
clocks:
maxItems: 1
clock-names:
const: pclk
interrupts:
maxItems: 1
reg:
maxItems: 1
power-domains:
maxItems: 1
required:
- compatible
- reg
- clocks
- clock-names
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/google,gs101.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
efuse@10000000 {
compatible = "google,gs101-otp";
reg = <0x10000000 0xf084>;
clocks = <&cmu_misc CLK_GOUT_MISC_OTP_CON_TOP_PCLK>;
clock-names = "pclk";
interrupts = <GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH>;
};
Annotation
- Immediate include surface: `dt-bindings/clock/google,gs101.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.