Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
Extension
.yaml
Size
3403 bytes
Lines
111
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/opp/operating-points-v2-ti-cpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI CPU OPP (Operating Performance Points)

description:
  TI SoCs, like those in the AM335x, AM437x, AM57xx, AM62x, and DRA7xx
  families, the CPU frequencies subset and the voltage value of each
  OPP vary based on the silicon variant used. The data sheet sections
  corresponding to "Operating Performance Points" describe the frequency
  and voltage values based on device type and speed bin information
  blown in corresponding eFuse bits as referred to by the Technical
  Reference Manual.

  This document extends the operating-points-v2 binding by providing
  the hardware description for the scheme mentioned above.

maintainers:
  - Dhruva Gole <d-gole@ti.com>

allOf:
  - $ref: opp-v2-base.yaml#

properties:
  compatible:
    const: operating-points-v2-ti-cpu

  syscon:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: |
      points to syscon node representing the control module
      register space of the SoC.

  opp-shared: true

patternProperties:
  '^opp(-?[0-9]+)*$':
    type: object
    additionalProperties: false

    properties:
      clock-latency-ns: true
      opp-hz: true
      opp-microvolt: true
      opp-supported-hw:
        items:
          items:
            - description:
                The revision of the SoC the OPP is supported by.
                This can be easily obtained from the datasheet of the
                part being ordered/used. For example, it will be 0x01 for SR1.0

            - description:
                The eFuse bits that indicate the particular OPP is available.
                The device datasheet has a table talking about Device Speed Grades.
                This table is to be sorted with only the unique elements of the
                MAXIMUM OPERATING FREQUENCY starting from the first row which
                tells the lowest OPP, to the highest. The corresponding bits
                need to be set based on N elements of speed grade the device supports.
                So, if there are 3 possible unique MAXIMUM OPERATING FREQUENCY
                in the table, then BIT(0) | (1) | (2) will be set, which means
                the value shall be 0x7.

      opp-suspend: true
      turbo-mode: true

    required:

Annotation

Implementation Notes