Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml- Extension
.yaml- Size
- 4404 bytes
- Lines
- 175
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom iProc PCIe controller with the platform bus interface
maintainers:
- Ray Jui <ray.jui@broadcom.com>
- Scott Branden <scott.branden@broadcom.com>
allOf:
- $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
items:
- enum:
# for the first generation of PAXB based controller, used in SoCs
# including NSP, Cygnus, NS2, and Pegasus
- brcm,iproc-pcie
# for the second generation of PAXB-based controllers, used in
# Stingray
- brcm,iproc-pcie-paxb-v2
# For the first generation of PAXC based controller, used in NS2
- brcm,iproc-pcie-paxc
# For the second generation of PAXC based controller, used in Stingray
- brcm,iproc-pcie-paxc-v2
reg:
maxItems: 1
description: >
Base address and length of the PCIe controller I/O register space
ranges:
minItems: 1
maxItems: 2
description: >
Ranges for the PCI memory and I/O regions
phys:
maxItems: 1
phy-names:
items:
- const: pcie-phy
dma-coherent: true
brcm,pcie-ob:
type: boolean
description: >
Some iProc SoCs do not have the outbound address mapping done by the
ASIC after power on reset. In this case, SW needs to configure it
brcm,pcie-ob-axi-offset:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
The offset from the AXI address to the internal address used by the
iProc PCIe core (not the PCIe address)
msi:
type: object
$ref: /schemas/interrupt-controller/msi-controller.yaml#
unevaluatedProperties: false
properties:
compatible:
items:
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.