Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
Extension
.yaml
Size
6580 bytes
Lines
267
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale i.MX6 PCIe host controller

maintainers:
  - Lucas Stach <l.stach@pengutronix.de>
  - Richard Zhu <hongxing.zhu@nxp.com>

description: |+
  This PCIe host controller is based on the Synopsys DesignWare PCIe IP
  and thus inherits all the common properties defined in snps,dw-pcie.yaml.
  The controller instances are dual mode where in they can work either in
  Root Port mode or Endpoint mode but one at a time.

  See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree
  bindings.

properties:
  compatible:
    oneOf:
      - enum:
          - fsl,imx6q-pcie
          - fsl,imx6qp-pcie
          - fsl,imx6sx-pcie
          - fsl,imx7d-pcie
          - fsl,imx8mm-pcie
          - fsl,imx8mp-pcie
          - fsl,imx8mq-pcie
          - fsl,imx8q-pcie
          - fsl,imx95-pcie
      - items:
          - enum:
              - fsl,imx94-pcie
              - fsl,imx943-pcie
          - const: fsl,imx95-pcie

  clocks:
    minItems: 3
    items:
      - description: PCIe bridge clock.
      - description: PCIe bus clock.
      - description: PCIe PHY clock.
      - description: Additional required clock entry for imx6sx-pcie,
           imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
      - description: PCIe internal reference clock.
      - description: PCIe additional external reference clock.

  clock-names:
    minItems: 3
    maxItems: 6

  interrupts:
    minItems: 1
    items:
      - description: builtin MSI controller.
      - description: builtin DMA controller.

  interrupt-names:
    minItems: 1
    items:
      - const: msi
      - const: dma

  reset-gpio:
    description: Should specify the GPIO for controlling the PCI bus device
      reset signal. It's not polarity aware and defaults to active-low reset

Annotation

Implementation Notes