Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
Extension
.yaml
Size
2944 bytes
Lines
98
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/microchip,pcie-host.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Microchip PCIe Root Port Bridge Controller

maintainers:
  - Daire McNamara <daire.mcnamara@microchip.com>

allOf:
  - $ref: plda,xpressrich3-axi-common.yaml#
  - $ref: /schemas/interrupt-controller/msi-controller.yaml#

properties:
  compatible:
    const: microchip,pcie-host-1.0 # PolarFire

  reg:
    minItems: 3

  reg-names:
    minItems: 3

  clocks:
    description:
      Fabric Interface Controllers, FICs, are the interface between the FPGA
      fabric and the core complex on PolarFire SoC. The FICs require two clocks,
      one from each side of the interface. The "FIC clocks" described by this
      property are on the core complex side & communication through a FIC is not
      possible unless it's corresponding clock is enabled. A clock must be
      enabled for each of the interfaces the root port is connected through.
      This could in theory be all 4 interfaces, one interface or any combination
      in between.
    minItems: 1
    items:
      - description: FIC0's clock
      - description: FIC1's clock
      - description: FIC2's clock
      - description: FIC3's clock

  clock-names:
    description:
      As any FIC connection combination is possible, the names should match the
      order in the clocks property and take the form "ficN" where N is a number
      0-3
    minItems: 1
    maxItems: 4
    items:
      pattern: '^fic[0-3]$'

  dma-noncoherent: true

  ranges:
    minItems: 1
    maxItems: 3

  dma-ranges:
    minItems: 1
    maxItems: 6

unevaluatedProperties: false

examples:
  - |
    soc {
        #address-cells = <2>;
        #size-cells = <2>;
        pcie0: pcie@2030000000 {

Annotation

Implementation Notes