Documentation/devicetree/bindings/pci/nxp,s32g-pcie.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/nxp,s32g-pcie.yaml

File Facts

System: Linux kernel
Corpus path: Documentation/devicetree/bindings/pci/nxp,s32g-pcie.yaml
Extension: .yaml
Size: 3524 bytes
Lines: 131
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: configuration, schema, or hardware description
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

dt-bindings/interrupt-controller/arm-gic.h
dt-bindings/phy/phy.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/nxp,s32g-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP S32G2xxx/S32G3xxx PCIe Root Complex controller

maintainers:
  - Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
  - Ionut Vicovan <ionut.vicovan@nxp.com>

description:
  This PCIe controller is based on the Synopsys DesignWare PCIe IP.
  The S32G SoC family has two PCIe controllers, which can be configured as
  either Root Complex or Endpoint.

properties:
  compatible:
    oneOf:
      - enum:
          - nxp,s32g2-pcie
      - items:
          - const: nxp,s32g3-pcie
          - const: nxp,s32g2-pcie

  reg:
    maxItems: 6

  reg-names:
    items:
      - const: dbi
      - const: dbi2
      - const: atu
      - const: dma
      - const: ctrl
      - const: config

  interrupts:
    minItems: 1
    maxItems: 2

  interrupt-names:
    items:
      - const: msi
      - const: dma
    minItems: 1

  pcie@0:
    description:
      Describe the S32G Root Port.
    type: object
    $ref: /schemas/pci/pci-pci-bridge.yaml#

    properties:
      reg:
        maxItems: 1

      phys:
        maxItems: 1

    required:
      - reg
      - phys

    unevaluatedProperties: false

required:
  - compatible
  - reg

Annotation

Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/phy/phy.h`.
Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.