Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml

File Facts

System: Linux kernel
Corpus path: Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
Extension: .yaml
Size: 8438 bytes
Lines: 333
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: configuration, schema, or hardware description
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

dt-bindings/clock/qcom,gcc-sdx55.h
dt-bindings/gpio/gpio.h
dt-bindings/interconnect/qcom,sdx55.h
dt-bindings/interrupt-controller/arm-gic.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm PCIe Endpoint Controller

maintainers:
  - Manivannan Sadhasivam <mani@kernel.org>

properties:
  compatible:
    oneOf:
      - enum:
          - qcom,sa8775p-pcie-ep
          - qcom,sar2130p-pcie-ep
          - qcom,sdx55-pcie-ep
          - qcom,sm8450-pcie-ep
      - items:
          - const: qcom,sdx65-pcie-ep
          - const: qcom,sdx55-pcie-ep

  reg:
    minItems: 6
    items:
      - description: Qualcomm-specific PARF configuration registers
      - description: DesignWare PCIe registers
      - description: External local bus interface registers
      - description: Address Translation Unit (ATU) registers
      - description: Memory region used to map remote RC address space
      - description: BAR memory region
      - description: DMA register space

  reg-names:
    minItems: 6
    items:
      - const: parf
      - const: dbi
      - const: elbi
      - const: atu
      - const: addr_space
      - const: mmio
      - const: dma

  clocks:
    minItems: 5
    maxItems: 9

  clock-names:
    minItems: 5
    maxItems: 9

  qcom,perst-regs:
    description: Reference to a syscon representing TCSR followed by the two
                 offsets within syscon for Perst enable and Perst separation
                 enable registers
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      - items:
          - description: Syscon to TCSR system registers
          - description: Perst enable offset
          - description: Perst separation enable offset

  interrupts:
    minItems: 2
    items:
      - description: PCIe Global interrupt
      - description: PCIe Doorbell interrupt
      - description: DMA interrupt

Annotation

Immediate include surface: `dt-bindings/clock/qcom,gcc-sdx55.h`, `dt-bindings/gpio/gpio.h`, `dt-bindings/interconnect/qcom,sdx55.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.