Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml
Extension
.yaml
Size
5691 bytes
Lines
184
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/qcom,pcie-sm8550.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm SM8550 PCI Express Root Complex

maintainers:
  - Bjorn Andersson <andersson@kernel.org>
  - Manivannan Sadhasivam <mani@kernel.org>

description:
  Qualcomm SM8550 SoC (and compatible) PCIe root complex controller is based on
  the Synopsys DesignWare PCIe IP.

properties:
  compatible:
    oneOf:
      - const: qcom,pcie-sm8550
      - items:
          - enum:
              - qcom,kaanapali-pcie
              - qcom,sar2130p-pcie
              - qcom,pcie-sm8650
              - qcom,pcie-sm8750
          - const: qcom,pcie-sm8550

  reg:
    minItems: 5
    maxItems: 6

  reg-names:
    minItems: 5
    items:
      - const: parf # Qualcomm specific registers
      - const: dbi # DesignWare PCIe registers
      - const: elbi # External local bus interface registers
      - const: atu # ATU address space
      - const: config # PCIe configuration space
      - const: mhi # MHI registers

  clocks:
    minItems: 7
    maxItems: 9

  clock-names:
    minItems: 7
    items:
      - const: aux # Auxiliary clock
      - const: cfg # Configuration clock
      - const: bus_master # Master AXI clock
      - const: bus_slave # Slave AXI clock
      - const: slave_q2a # Slave Q2A clock
      - const: ddrss_sf_tbu # PCIe SF TBU clock
      - const: noc_aggr # Aggre NoC PCIe AXI clock
      - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
      - const: qmip_pcie_ahb # QMIP PCIe AHB clock

  interrupts:
    minItems: 8
    maxItems: 9

  interrupt-names:
    minItems: 8
    items:
      - const: msi0
      - const: msi1
      - const: msi2
      - const: msi3

Annotation

Implementation Notes