Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml- Extension
.yaml- Size
- 4912 bytes
- Lines
- 181
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: DesignWare based PCIe Root Complex controller on Rockchip SoCs
maintainers:
- Shawn Lin <shawn.lin@rock-chips.com>
- Simon Xue <xxm@rock-chips.com>
- Heiko Stuebner <heiko@sntech.de>
description: |+
RK3568 SoC PCIe Root Complex controller is based on the Synopsys DesignWare
PCIe IP and thus inherits all the common properties defined in
snps,dw-pcie.yaml.
properties:
compatible:
oneOf:
- const: rockchip,rk3568-pcie
- items:
- enum:
- rockchip,rk3528-pcie
- rockchip,rk3562-pcie
- rockchip,rk3576-pcie
- rockchip,rk3588-pcie
- const: rockchip,rk3568-pcie
reg:
items:
- description: Data Bus Interface (DBI) registers
- description: Rockchip designed configuration registers
- description: Config registers
reg-names:
items:
- const: dbi
- const: apb
- const: config
legacy-interrupt-controller:
description: Interrupt controller node for handling legacy PCI interrupts.
type: object
additionalProperties: false
properties:
"#address-cells":
const: 0
"#interrupt-cells":
const: 1
interrupt-controller: true
interrupts:
items:
- description: combined legacy interrupt
required:
- "#address-cells"
- "#interrupt-cells"
- interrupt-controller
- interrupts
msi-map: true
ranges:
minItems: 2
maxItems: 3
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.