Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml- Extension
.yaml- Size
- 2913 bytes
- Lines
- 120
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/irq.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/clock/exynos5433.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung SoC series PCIe Host Controller
maintainers:
- Marek Szyprowski <m.szyprowski@samsung.com>
- Jaehoon Chung <jh80.chung@samsung.com>
description: |+
Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare
PCIe IP and thus inherits all the common properties defined in
snps,dw-pcie.yaml.
allOf:
- $ref: /schemas/pci/snps,dw-pcie.yaml#
properties:
compatible:
const: samsung,exynos5433-pcie
reg:
items:
- description: Data Bus Interface (DBI) registers.
- description: External Local Bus interface (ELBI) registers.
- description: PCIe configuration space region.
reg-names:
items:
- const: dbi
- const: elbi
- const: config
interrupts:
maxItems: 1
clocks:
items:
- description: PCIe bridge clock
- description: PCIe bus clock
clock-names:
items:
- const: pcie
- const: pcie_bus
phys:
maxItems: 1
vdd10-supply:
description:
Phandle to a regulator that provides 1.0V power to the PCIe block.
vdd18-supply:
description:
Phandle to a regulator that provides 1.8V power to the PCIe block.
num-lanes:
const: 1
num-viewport:
const: 3
required:
- reg
- reg-names
- interrupts
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/clock/exynos5433.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.