Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
Extension
.yaml
Size
3369 bytes
Lines
127
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/starfive,jh7110-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: StarFive JH7110 PCIe host controller

maintainers:
  - Kevin Xie <kevin.xie@starfivetech.com>

allOf:
  - $ref: plda,xpressrich3-axi-common.yaml#

properties:
  compatible:
    const: starfive,jh7110-pcie

  reg:
    maxItems: 2

  reg-names:
    maxItems: 2

  clocks:
    items:
      - description: NOC bus clock
      - description: Transport layer clock
      - description: AXI MST0 clock
      - description: APB clock

  clock-names:
    items:
      - const: noc
      - const: tl
      - const: axi_mst0
      - const: apb

  resets:
    items:
      - description: AXI MST0 reset
      - description: AXI SLAVE0 reset
      - description: AXI SLAVE reset
      - description: PCIE BRIDGE reset
      - description: PCIE CORE reset
      - description: PCIE APB reset

  reset-names:
    items:
      - const: mst0
      - const: slv0
      - const: slv
      - const: brg
      - const: core
      - const: apb

  starfive,stg-syscon:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    description:
      The phandle to System Register Controller syscon node.

  perst-gpios:
    description: GPIO controlled connection to PERST# signal
    maxItems: 1

  phys:
    description:
      Specified PHY is attached to PCIe controller.
    maxItems: 1

Annotation

Implementation Notes