Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml- Extension
.yaml- Size
- 3668 bytes
- Lines
- 149
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.hdt-bindings/phy/phy.hdt-bindings/soc/ti,sci_pm_domain.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/ti,am65-pci-host.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI AM65 PCI Host
maintainers:
- Kishon Vijay Abraham I <kishon@ti.com>
allOf:
- $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
compatible:
enum:
- ti,am654-pcie-rc
- ti,keystone-pcie
reg:
minItems: 4
maxItems: 6
reg-names:
minItems: 4
items:
- const: app
- const: dbics
- const: config
- const: atu
- const: vmap_lp
- const: vmap_hp
interrupts:
maxItems: 1
power-domains:
maxItems: 1
ti,syscon-pcie-id:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: Phandle to the SYSCON entry
- description: pcie_device_id register offset within SYSCON
description: Phandle to the SYSCON entry required for getting PCIe device/vendor ID
ti,syscon-pcie-mode:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: Phandle to the SYSCON entry
- description: pcie_ctrl register offset within SYSCON
description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.
msi-map: true
dma-coherent: true
num-viewport:
$ref: /schemas/types.yaml#/definitions/uint32
phys:
description: per-lane PHYs
minItems: 1
maxItems: 2
phy-names:
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/phy/phy.h`, `dt-bindings/soc/ti,sci_pm_domain.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.