Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml- Extension
.yaml- Size
- 4903 bytes
- Lines
- 207
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/soc/ti,sci_pm_domain.hdt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI J721E PCI Host (PCIe Wrapper)
maintainers:
- Kishon Vijay Abraham I <kishon@ti.com>
properties:
compatible:
oneOf:
- const: ti,j721e-pcie-host
- const: ti,j784s4-pcie-host
- description: PCIe controller in AM64
items:
- const: ti,am64-pcie-host
- const: ti,j721e-pcie-host
- description: PCIe controller in J7200
items:
- const: ti,j7200-pcie-host
- const: ti,j721e-pcie-host
- description: PCIe controller in J722S
items:
- const: ti,j722s-pcie-host
- const: ti,j721e-pcie-host
reg:
maxItems: 4
reg-names:
items:
- const: intd_cfg
- const: user_cfg
- const: reg
- const: cfg
ti,syscon-acspcie-proxy-ctrl:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: Phandle to the ACSPCIE Proxy Control Register
- description: Bitmask corresponding to the PAD IO Buffer
output enable fields (Active Low).
description: Specifier for enabling the ACSPCIE PAD outputs to drive
the reference clock to the Endpoint device.
ti,syscon-pcie-ctrl:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: Phandle to the SYSCON entry
- description: pcie_ctrl register offset within SYSCON
description: Specifier for configuring PCIe mode and link speed.
power-domains:
maxItems: 1
clocks:
minItems: 1
maxItems: 2
description: |+
clock-specifier to represent input to the PCIe for 1 item.
2nd item if present represents reference clock to the connector.
clock-names:
minItems: 1
Annotation
- Immediate include surface: `dt-bindings/soc/ti,sci_pm_domain.h`, `dt-bindings/gpio/gpio.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.