Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml- Extension
.yaml- Size
- 2615 bytes
- Lines
- 103
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/imx8mm-clock.hdt-bindings/phy/phy-imx8-pcie.hdt-bindings/reset/imx8mq-reset.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX8 SoC series PCIe PHY
maintainers:
- Richard Zhu <hongxing.zhu@nxp.com>
properties:
"#phy-cells":
const: 0
compatible:
enum:
- fsl,imx8mm-pcie-phy
- fsl,imx8mp-pcie-phy
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: ref
resets:
minItems: 1
maxItems: 2
reset-names:
oneOf:
- items: # for iMX8MM
- const: pciephy
- items: # for IMX8MP
- const: pciephy
- const: perst
fsl,refclk-pad-mode:
description: |
Specifies the mode of the refclk pad used. It can be UNUSED(PHY
refclock is derived from SoC internal source), INPUT(PHY refclock
is provided externally via the refclk pad) or OUTPUT(PHY refclock
is derived from SoC internal source and provided on the refclk pad).
Refer include/dt-bindings/phy/phy-imx8-pcie.h for the constants
to be used.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 0, 1, 2 ]
fsl,tx-deemph-gen1:
description: Gen1 De-emphasis value (optional).
$ref: /schemas/types.yaml#/definitions/uint32
default: 0
fsl,tx-deemph-gen2:
description: Gen2 De-emphasis value (optional).
$ref: /schemas/types.yaml#/definitions/uint32
default: 0
fsl,clkreq-unsupported:
type: boolean
description: A boolean property indicating the CLKREQ# signal is
not supported in the board design (optional)
power-domains:
description: PCIe PHY power domain (optional).
Annotation
- Immediate include surface: `dt-bindings/clock/imx8mm-clock.h`, `dt-bindings/phy/phy-imx8-pcie.h`, `dt-bindings/reset/imx8mq-reset.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.